I was looking at the NBIC schematic (
http://www.nextcomputers.org/NeXTfiles/Docs/Hardware/NeXTbus-NBIC/NBIC_Schematic.pdf) and it looks like you could build an NBIC out of readily available parts. I was able to source all of these from digikey.
ICs
1x 74ACT573
1x 74F175
2x PAL16L8
1x 74AC138
11x 74HC574
1x 74AS04
Resistors
6x 10K
Caps
12x 0.1
1x 100
Does anyone have any clearer scans of the NBIC schematic? I'd like to digitize it in fritzing or eagle or something.
http://www.ti.com/lit/ds/scas538d/scas538d.pdfhttp://www.ti.com/lit/ds/snos163a/snos163a.pdfhttp://www.ti.com/lit/ds/symlink/pal16l8am.pdfhttp://www.fairchildsemi.com/ds/74/74AC138.pdfhttp://www.nxp.com/documents/data_sheet/74HC_HCT574.pdfhttp://www.unicornelectronics.com/ftp/Data%20Sheets/74as04-als04.pdfYou could probably just program the logic into an fpga from the data sheets.
It should be possible to get away with two PALs and a bit of TTL logic - I remember building a Mac NuBus card years ago which required about the same amount of hardware. However, this minimal interface hardware might not support all NuBus features (like busmastering).
Perhaps it's a good idea to find a copy of "Designing cards and drivers for the Macintosh family" (I don't know if I still have my copy). There seems to be a PDF copy of the book online at
http://dec8.info/Apple/Designing_Cards_and_Drivers_for_the_Macintosh_Family_2ed_May90.pdf (which is probably not 100% legal, but I doubt anyone at Apple will care nowadays) - I think NeXT's NuBus implementation is still reasonably close to what Apple and TI used in Macs and S1500 Unix/Explorer Lisp machine systems.
-- Michael
I found a copy on Amazon for $4.00
Quote from: "cuby"I think NeXT's NuBus implementation is still reasonably close to what Apple and TI used in Macs and S1500 Unix/Explorer Lisp machine systems.
Except for speed, I believe. NeXTBus is 25MHz, NuBus was 10?
Yes. NeXTBus ran faster.
Quote from: "cubist"Quote from: "cuby"I think NeXT's NuBus implementation is still reasonably close to what Apple and TI used in Macs and S1500 Unix/Explorer Lisp machine systems.
Except for speed, I believe. NeXTBus is 25MHz, NuBus was 10?
That's funny. On the schematic in the archive, there is a part (not an input and not a xtal part symbol?) labeled "LOCAL BUS CLOCK" "X1 XTAL_OSC 10 MHZ". It appears to be connected to CPUCLK and LCKL pins as well as the CLK pin on the 74F175 (Johnson counter).
Quote from: "jroark"Quote from: "cubist"Quote from: "cuby"I think NeXT's NuBus implementation is still reasonably close to what Apple and TI used in Macs and S1500 Unix/Explorer Lisp machine systems.
Except for speed, I believe. NeXTBus is 25MHz, NuBus was 10?
That's funny. On the schematic in the archive, there is a part (not an input and not a xtal part symbol?) labeled "LOCAL BUS CLOCK" "X1 XTAL_OSC 10 MHZ". It appears to be connected to CPUCLK and LCKL pins as well as the CLK pin on the 74F175 (Johnson counter).
This is the clock for the local logic (on the NeXTBus card side vs. the Bus side) - however, I don't know why there is a separate CPUCLK signal on the local side...
Btw., is there any information on the logic equations required for the PALs? I couldn't find them in NeXTfiles section.
@jroark Did you ever succeed at getting a higher resolution scan of these schematics? I recently thought about designing an add-in card for my NeXTCube as well. Was thinking of trying to build a card that makes the cube a hat for a raspberry pi. It would require some driver magic to bridge the two boards, but the PI has Ethernet, HDMI, USB, and memory card ports that could be useful on the cube. I'm in the SF area as well, would be interested in collaborating.
This looks to be the next project I am going to pick up. I need a few prototyping boards for my projects anyway. I've collected together a bunch of info and while there are still some unanswered questions, it's nothing a weekend of reading won't fix.
A couple of things up front: I'll use discrete logic - socketed DIP components, because it is critical to have complete transparency into what is happening, and you don't necessarily get that with a GAL or small CPLD. They are perfect for production, but for dev and testing, not so great.
I also plan to replace the entire field of array holes with a smaller array of holes and room for some good quality breadboards. Partly, this is because through holes/vias are expensive when you want several thousand of them. Partly, because it enables faster prototyping at a medium compromise to signal quality. The biggest problem is that with the number of holes specified it forces the bare PCB to be over $150, but with 1/3rd the holes it is only $20 or so.
The other issue I see is that some people will want to wire wrap, and the current cube backplane and enclosure doesn't really allow for that depth on the top AND bottom sides of the card. For this reason, I will be making a replacement backplane that can be used externally. It will have a couple of extra slots (logically and physically) and have the slots continuous with no break for the PSU. This will give better bus behavior. It will allow external dev and testing for those who, like me, have the desire to do so.
I have a fairly clear idea of what I need for my own basic needs. If there's not a lot of other interest I'll just do my thing for me and document it here. If more than a couple of you want more than a couple of boards I will definitely accommodate your needs too.
Please hold me informed as I also want o investigate (dreaming of interfacing a raspberry pi compute module...)