There has been discussion in another thread about combining programming, VHDL and hardware skills of multiple people to design an FPGA-based NeXTgen...
In summary, the idea was floated to use an FPGA to refactor the onboard logic. The idea was also floated to use a real CPU, a software emulator like PiStorm, or a VHDL model of a CPU. Either way, the CPU model would be able to run very, very fast.
Let's brainstorm!
I think we have a fairly good idea of what the register interface to the proprietary as well as standard chips used by 68k NeXT systems looks like. On the one hand, there is a lot of code in previous that contains this knowledge (and I think the previous code is rather nice and easy to read - especially compared to e.g. qemu :) ). On the other hand, we have some supported open source operating systems such as NetBSD or Plan 9 that exhibit different approaches to access/use the hardware, which can be useful to detect corner cases (like the access to a shadow address for one of the system registers done by the 2nd edition Plan 9 kernel).
It would be nice if we could use all this information to distill something like a NeXT 68k hardware reference manual (including information on all variants), listing register addresses and their semantics, interrupts, etc. This document could then serve as a reference for a future FPGA hardware implementation.
I wonder if such a document ever existed inside NeXT, Inc.?
That would be a very useful result of the project for the community down the road.
I'd be happy to collate and make presentable that info as a living document.
Something interesting that might be a useful basis for a NeXT FPGA clone. The Trollbook project built a palmtop computer prototype based on a 68040V and an Altera Flex10k FPGA. The project web page is only available on archive.org (
https://web.archive.org/web/20181124144401/https://h4xxel.org/electronics/trollbook/), but the github repositories for the project's hard- and software (the authors built their own OS and an emulator based on the previous CPU emulation) are still alive:
The project seems to be abandoned (the last update was in 2017) and is probably buggy and incomplete, but it seems they at least managed to drive an LC display and to run some code from an SD card.
Something else that might be interesting - the FPGA-based Pano Logic G2 Thin Clients have gained support for running Linux (
https://github.com/timvideos/litex-buildenv/wiki/HowTo-Linux-on-Pano-Logic-G2), an NES implementation (
https://github.com/skiphansen/panog2_nes), and Ethernet+USB (
https://github.com/skiphansen/panog2_usb_sniffer) as well as other projects in early stages.
The devices are available on eBay for around US$20-30 and have a large Xilinx Spartan 6SLX150 FPGA (or SLX100 in some versions) FPGA, 128 MB RAM, DVI, Ethernet and USB. The FPGA is supported by the latest free version of the Xilinx ISE webpack software (14.7, Windows version only - which has a Linux VM inside IIRC...).
I think the FPGA might be large enough to implement an 68040 (perhaps using binary translation on a RISC-V CPU similar to the old Transmeta CPUs?) and the rest of the NeXT hardware - at least for a Mono NeXTStation.
And... the case of the Pano Logic thin clients is ...a black (almost) cube! ;D