Title: Not NeXT Related But Motorola Related
Post by: BtcBiohacker on June 11, 2023, 03:10:19 PM
Post by: BtcBiohacker on June 11, 2023, 03:10:19 PM
Does anyone believe this by ralph klimek? That Motorola had 100mhz nand gates in the 1960s, and no one publicly used them outside of the military until Cray computers used them in the first Cray?
https://users.monash.edu.au/~ralphk/ecl-rant.html
It's a bit above my understanding, to be sure. It seems to be about to analog radio circuitry.
https://users.monash.edu.au/~ralphk/ecl-rant.html
It's a bit above my understanding, to be sure. It seems to be about to analog radio circuitry.
Title: Re: Not NeXT Related But Motorola Related
Post by: cuby on June 12, 2023, 04:08:15 PM
Post by: cuby on June 12, 2023, 04:08:15 PM
By coincidence, a colleague gave me a board populated with Motorola MECL-I SSI chips built in 1970. We're still trying to figure out which system this board came from - it could be a part of a CPU or state machine, since there are five 4-bit bitslice half adders (MC353 half adders).
The ICs used in this board were designed in the 1960s and seem to be able to run at a bit more than 10 MHz, not 100 (typical propagation delays between 7 and 12.5 ns). I think there were two followup series of MECL product with lower delays and 100 MHz doesn't seem to be out of the question at least in the late 1970s.
The Cray 1 - back then the fastest supercomputer - was announced in 1975 and (according to Wikipedia) used four different IC types implementing ~200k gates supplied by Fairchild and Motorola, an ECL dual 5-4 NOR gate (one 5-input, and one 4-input, each with differential output), another slower MECL 10K 5-4 NOR gate used for address fanout, a 16×4-bit high speed (6 ns) static RAM (SRAM) used for registers and a 1,024×1-bit 48 ns SRAM used for the main memory. These were mostly SSI ECL's, so the machine probably used more than 100k ICs. The Cray 1's CPU ran at 80 MHz, which was quite impressive back then, of course.
My theory is that ECL never caught on due to its significantly higher power consumption compared to TTL/LS. The Cray 1 is surely an outlier with 115 kW @ 208 V 400 Hz (assumedly including peripherals, storage, and the cooling systems). The "strange" supply voltages required for ECL might have also made them more difficult to handle.
The ICs used in this board were designed in the 1960s and seem to be able to run at a bit more than 10 MHz, not 100 (typical propagation delays between 7 and 12.5 ns). I think there were two followup series of MECL product with lower delays and 100 MHz doesn't seem to be out of the question at least in the late 1970s.
The Cray 1 - back then the fastest supercomputer - was announced in 1975 and (according to Wikipedia) used four different IC types implementing ~200k gates supplied by Fairchild and Motorola, an ECL dual 5-4 NOR gate (one 5-input, and one 4-input, each with differential output), another slower MECL 10K 5-4 NOR gate used for address fanout, a 16×4-bit high speed (6 ns) static RAM (SRAM) used for registers and a 1,024×1-bit 48 ns SRAM used for the main memory. These were mostly SSI ECL's, so the machine probably used more than 100k ICs. The Cray 1's CPU ran at 80 MHz, which was quite impressive back then, of course.
My theory is that ECL never caught on due to its significantly higher power consumption compared to TTL/LS. The Cray 1 is surely an outlier with 115 kW @ 208 V 400 Hz (assumedly including peripherals, storage, and the cooling systems). The "strange" supply voltages required for ECL might have also made them more difficult to handle.